我的专用集成电路设计_2datapath.ppt

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我的专用集成电路设计_2datapath.ppt

* Chap 2 Course Work Design blocks 1 and 2 in a static 8 bit full-adder. Design a 4:2 compressor and use PSpice to simulate the power dissipation. Compare your design with two published deigns. State the principle of Booth encoding and design a Booth encoder based 4 bit multiplier. Submit it before 8th April, 2011 * Power Dissipation Comparison * 2.3.9. Carry-look ahead adder Full Adder Ripple-carry adder FA FA FA FA FA Simple; low speed * Propagate term Generate term Carry term 2.3.9. Carry-look ahead adder Principle * Depth-4 carry-lookahead Carry-lookahead network 2.3.9. Carry-look ahead adder * is the carry input from the least significant FA and can be connected to 0. Where there is no carry input and next level does not depend on previous computation result. 2.3.9. Carry-look ahead adder * Static 8 bit Adder Questions: why do we need so many inverters? 2.3.9. Carry-look ahead adder * 2.3.9. Carry-look ahead adder Carry: carry starts with the computation of two intermediate values. merits:high speed Demerits:complicated circuit Summarize * 2.4 Multiplier 2.4.1 Basic principle 2.4.2 Array multiplier 2.4.3 Tree multiplier Wallace tree principle 2.4.4 4:Compressor Structure principle(Basic, full-adder, Mux, Xor, TG etc.),Characteristics 2.4.5 Booth encoding based multiplier * Take two unsigned binary digits with M bits and N bits width for example. Multiplication definition: Adder based multiplication needs M cycles. 2.4.1 Basic principle * Multiplication is carried to multiply one digit of the multiplier by the full multiplicand, add the result, shifted by the proper number of bits, to the partial product. All the partial products are generated simultaneously and is carried out by an array multiplier. Multiplicand Multiplier Partial product Result array multiplier 2.4.1 Basic principle * Binary multiplier 1 0 1 0 1 0 × 1 0 1 1 Partial product Multiplicand Mult

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