《Event Propagation for Accurate Circuit Delay Calculation using SAT》.pdfVIP

《Event Propagation for Accurate Circuit Delay Calculation using SAT》.pdf

  1. 1、本文档共23页,可阅读全部内容。
  2. 2、原创力文档(book118)网站文档一经付费(服务费),不意味着购买了该文档的版权,仅供个人/单位学习、研究之用,不得用于商业用途,未经授权,严禁复制、发行、汇编、翻译或者网络传播等,侵权必究。
  3. 3、本站所有内容均由合作方或网友上传,本站不对文档的完整性、权威性及其观点立场正确性做任何保证或承诺!文档内容仅供研究参考,付费前请自行鉴别。如您付费,意味着您自己接受本站规则且自行承担风险,本站不退款、不进行额外附加服务;查看《如何避免下载的几个坑》。如果您已付费下载过本站文档,您可以点击 这里二次下载
  4. 4、如文档侵犯商业秘密、侵犯著作权、侵犯人身权等,请点击“版权申诉”(推荐),也可以打举报电话:400-050-0827(电话支持时间:9:00-18:30)。
  5. 5、该文档为VIP文档,如果想要下载,成为VIP会员后,下载免费。
  6. 6、成为VIP后,下载本文档将扣除1次下载权益。下载后,不支持退款、换文档。如有疑问请联系我们
  7. 7、成为VIP后,您将拥有八大权益,权益包括:VIP文档下载权益、阅读免打扰、文档格式转换、高级专利检索、专属身份标志、高级客服、多端互通、版权登记。
  8. 8、VIP文档为合作方或网友上传,每下载1次, 网站将根据用户上传文档的质量评分、类型等,对文档贡献者给予高额补贴、流量扶持。如果你也想贡献VIP文档。上传文档
查看更多
《Event Propagation for Accurate Circuit Delay Calculation using SAT》.pdf

Event Propagation for Accurate Circuit Delay Calculation Using SAT SUCHISMITA ROY, P. P. CHAKRABARTI, and PALLAB DASGUPTA Indian Institute of Technology, Kharagpur A SAT-based modeling for event propagation in gate-level digital circuits, which is used for accurate calculation of critical delay in combinational and sequential circuits, is presented in this article. The accuracy of the critical delay estimation process depends on the accuracy with which the circuit in operation is modeled. A high level of precision in the modeling of the internal events in a circuit for the sake of greater accuracy causes a combinatorial blowup in the size of the problem, resulting in a scalability bottleneck for which most existing techniques effect a trade-off by restricting themselves to less precise models. SAT based techniques have a good track record in efficiency and scalability when the problem sizes become too large for most other methods. This article proposes a SAT-based technique for symbolic event propagation within a circuit which facilitates the estimation of the critical delay of circuits with a greater degree of accuracy, while at the same time scaling efficiently to large circuits. We report very encouraging results on the ISCAS85 and ISCAS89 benchmark circuits using the proposed technique. Categories and Subject Descriptors: C.4 [Performance of Systems]—Modeling techniques General Terms: Design Additional Key Words and Phrases: Critical delay, event propagation, SAT ACM Reference Format: Roy, S., Chakrabarti, P.P., and Dasgupta, P. 2007. Event propagation for accurate circuit delay calculation using SAT. ACM Trans. Des. Autom. Electron. Syst. 12, 3, Article 36 (August 2007), 23 pages. DOI = 10.1145/1255456.1255473 /10.1145/1255456.1255473 1. INTRODUCTION Accurate and efficient estimation of timing delays in digital circuits is a crit- ical and challenging task, particularly due to the role of delay estimation in determining the speed of ope

文档评论(0)

wgvi + 关注
实名认证
文档贡献者

该用户很懒,什么也没介绍

1亿VIP精品文档

相关文档