毕业论文-（设计）_基于VHDL的数字时钟的设计(正稿).docVIP

JINGGANGSHAN UNIVERSITY 专科毕业论文（设计） 题目：基于VHDL的数字时钟设计 学 院 电子与信息工程学院 专 业 电子与信息工程技术 姓 名 班 级 学 号 指导教师 起讫时间 基于VHDL的数字时钟设计 [摘要] 随着EDA技术的发展和应用领域的扩大与深入，EDA技术在电子信息、通信及计算机领域的重要性日益突出。同时，随着技术市场和人才市场对EDA技术需求的不断提高，产品的市场效率和技术要求也必然会反映到教学和科研领域钟来。而EDA技术就是依赖功能强大的计算机，在EDA工具软件平台上，对以硬件描述语言VHDL为系统逻辑描述手段完成的设计文件，自动的完成逻辑优化和仿真测试，直至实现既定的电子线路系统功能。本题介绍了利用VHDL硬件描述语言设计的多功能数字钟的思路和巧。在MAX+PLUSII开发环境中编译和仿真了所设计的程序，并在上下栽验证。仿真和证结果表明，该设计方法切实可行。数字钟；硬件描述语言；VHDL；MAX+PLUSII。 一、EDA技术概述··························································4 二、Altera Max+plus II 简介··············································5 三、设计任务及要求·······················································6 3.1设计任务··························································6 3.2设计要求··························································6 四、系统电路设计·························································6 4.1 VHDL语言开发的流程···············································6 4.2 系统框架图·······················································7 4.3电路设计思路与实现················································8 五、电路功能调试及测试················································8 5.1测试内容及步骤····················································8 5.2 模块说明························································8 5.3 数字钟各模块连接示意图···········································9 5.4功能测试··························································9 5.5 小结····························································9 六、小结·· ···························································9 实物图··································································17 参考文献································································18 一、EDA技术概述 EDA是Electronic Design Automation）的缩写，在20世纪90年代初从（CAD）、CAM）、CAT）和（CAE）的概念发展而来的。EDA技术就是以计算机为工具，设计者在EDA软件平台上，用硬件描述语言VHDL完成设计文件，然后由计算机自动地完成逻辑编译、化简、分割、综合、优化、布局、布线和仿真，直至对于特定目标芯片的适配编译、逻辑映射和编程下载等工作。 　 可编程逻辑器件的两种主要类型是现场可编程门阵列（FPGA）和复杂可编程逻辑器件（CPLD）。在这两类可编程逻辑器件中，FPGA提供了最高的逻辑密度、最丰富的特性和最高的性