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Reduction of sidewall roughness in silicon-on-insulator rib waveguides》.pdf
Applied Surface Science 252 (2006) 5071–5075
/locate/apsusc
Reduction of sidewall roughness in silicon-on-insulator
rib waveguides
F. Gao *, Y. Wang, G. Cao, X. Jia, F. Zhang
Ion Beam Laboratory, Shanghai Institute of Microsystem and Information Technology,
Chinese Academy of Sciences, 865 Changning Road, Shanghai 200050, PR China
Received 29 March 2005; received in revised form 22 July 2005; accepted 23 July 2005
Available online 15 September 2005
Abstract
Silicon-on-insulator (SOI) rib waveguides with residual sidewall roughness were achieved through inductive coupled plasma
reactive ion etching (ICPRIE) process. Sidewall roughness is the dominant scattering loss source. Conventional ICPRIE could result
in the sidewall ripples derived from the etch/deposition cycle steps. Mixed ICPRIE process and hydrogen annealing were used to
improve the sidewall roughness of SOI rib waveguides and eliminate the sidewall ripples. Scan electron microscope and atomic
force microscope were used to demonstrate the surface profiles of the sidewall. The results indicated that the sidewall roughness
could be low down to 0.3 nm level by optimization and combination of these two techniques and the ripples disappeared. According
to the scattering theory developed by Payne and Lacey, the scattering loss could be reduced to below 0.01 dB/cm.
# 2005 Elsevier B.V. All rights reserved.
PACS: 42.82.Et; 42.81.Dp; 52.80.Yr
Keywords: Silicon-on-insulator (SOI); Sidewall roughness; Inductive coupled plasma reactive ion etching (ICPRIE); Scattering loss
1. Introduction
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