Strained Si, SiGe, and Ge on-insulator Review of wafer bonding fabrication techniques》.pdfVIP

Solid-State Electronics 48 (2004) 1297–1305 /locate/sse Strained Si, SiGe, and Ge on-insulator: review of wafer bonding fabrication techniques Gianni Taraschi *, Arthur J. Pitera, Eugene A. Fitzgerald Massachusetts Institute of Technology, Building 13 - 4150, 77 massachusetts Avenue, Cambridge, MA 02139, USA Received 7 November 2003; received in revised form 18 December 2003; accepted 30 January 2