ModelingSomeSecond-OrderNon-idealitiesinHighOrderSigmaDeltaModulators.docVIP

Modeling Some Second-Order Non-idealities in High Order Sigma Delta Modulators Bingxin Li and Hannu Tenhunen Electronic System Design Laboratory, Royal Institute of Technology Electrum 229, Isafjordsgatan 22, 164 40 Kista, Sweden Email: lbingxin, hannu@ele.kth.se Abstract: This paper presents a behavioral modeling of several second-order sigma delta modulator non-idealitis such as switch resistance, capacitor non-lineairty, comparator offset and hysteresis, and integrator setting behavior. The effect of these non-idealities and the conditions under which the influence of these effects can be ignored are analysised respectively, and simulated with a 4th order cascaded modulator targeted for IF signal processing. 1. INTRODUCTION Sigma delta modulators take the advantage of the fast development of standard CMOS process technique, and provide a high-resolution A/D interface for DSP. They adopt oversampling and noise shaping technology to move the quantization noise out of signal band, and then digitally low-pass filter the shaped noise. The operation is based on the using of non-linear quantization device and strong feedback of the quantized value to a loop filter in the modulator. When using the ideal linear model the dynamic range is estimated with the following equation, where N is the modulator order and b is the bits of the quantizer. In real designs this dynamic range is reduced by both stability considerations [1] and component non-idealities. Therefor it is of importance to evaluate and simulate the influence of circuit non-idealities. Due to the complexity of sigma delta modulators, it is extremely time-consuming to do SPICE level simulation. And for sigma delta modulators the detail of the internal signal waveform is not important as long as we get its final settled value at the end of each clock phase. This enables the use of high abstract-level simulation [2], for example, MATLAB or analog HDL. They are normally very fast, while the drawback is the limite