soc时代低功耗设计的研究与进展_王祚栋.pdfVIP

35 2 Vol. 35, 2 2005 4 Microelectr onics Apr . 2005 : 1004-3365(2005) 02-0174-06 SOC 王祚栋, 魏少军 ( , 100084) : 　在片上系统( SOC) 时代, 芯片内核的超高功耗密度以及移动应用市 对低功耗的无止境 需求, 使低功耗设计变得日益重要。文章全面系统地介绍了低功耗设计的相关内容, 包括背景、原理 和不同层次的功耗优化技术, 着重介绍了面向SOC 的系统级功耗优化技术。通过对已有研究成果 按设计抽象层次和系统功能的分析, 指出了其优化的全局性不够充分。提出了基于软硬件协同设计 的系统功耗优化思路和设计流程, 展望了SOC 低功耗设计的发展方向。 : 片上系统; 低功耗设计; IC 设计 : 　 47 : T N A Research and Progress of Low Power Design in SOC Era - , - WANG Zuo dong WEI S ao jun ( I nsti tut e of M icroelect ronics , T s ing hua Univ er si ty , Beij ing 100084, P . R . China) , , Abstract: In SOC era t e ultra ig pow er density of t e c ip toget er w it t e greedy demand of t e mobile market for low power, makes low pow er design increasingly important . T e design for low power, including its background, principle and t ec niques, is systematically described, w it emp asis on system-level power . optimization tec nologies targeted for SOC s T roug analysis of t e existing study results by various abstract , . levels and system funct ions a severe deficiency of insufficient global optimality is discovered A constructive idea for system pow er optimizat ion and a design flow based on ardw are/ softw are co-design are presented. Finally , t e development trend of t e low pow er design of SOCs in t e fut ure is discussed. Key words : System -on-c ip; Low power design; IC design 2570 EEACC: