BooleanAlgebra-ECE.pptVIP

ENEE 644 Dr. Ankur Srivastava Office: 1349 A.V. Williams Email: ankurs@ URL: /class/enee644/ Course Outline Introduction Algorithms and Tools Two-Level Logic Synthesis Multi-Level Logic Synthesis Sequential System Synthesis Introduction Very Large Scale Integration (VLSI) Computer-Aided Design Design Process Design Styles Logic Synthesis: an Overview Design Space and Optimization VLSI Circuits Integrated Circuits SSI, MSI, LSI, and VLSI Moore’s Law Microelectronics is the Enabling Technology (Micro-Electro-Mechanics more recently) Design Automation is the Enabling Tool Moore’s Law The logic density of silicon integrated circuits is doubled every 18 months. Intel 4004 (1971) Intel’s first microprocessor 2,300 transistors 108 KHz 10 micron Intel386? (1985) First 32-bit chip 275,000 transistors 16MHz – 33 MHz 1 micron Multi-tasking Pentium?III(1999) 9.5 million transistors 0.25-micron technology Internet Streaming SIMD extensions Design Technology Challenges Productivity design meaningfully with huge number of transistors Power design under the single-chip package power limit Manufacturing Integration Interference resource-efficient communication and synchronization Error-Tolerance relaxation of the requirement of 100% correctness Source: ITRS 2001 Edition Computer Aided Design Role History Difficulty: size, NP-hard Market and Key Players Tens of billions $ industry 4 major CAD companies CAD groups in large companies Universities with strong CAD groups Conferences and Journals Brief History of CAD 1950-1965 manual design, impractical algorithms (even for MSI). 1965-1975 physical design tools for automatic layout of gate arrays IBM: Engineering Design System ATT: LTX system for standard cells logic design tools: IBM’s Mini: 2-level heuristic minimizer Espresso: (IBM and Berkeley) PLA-based design 1975-1985 placement and routing, technology mapping, multi-level optimization theoretical development in physical design 1985- performance/power dri