数字电路第六章概论.ppt

Chapter6  Combinational Logic Design Practices;Chapter Outline;6.1 Documentation Standard(文档标准) ;Block Diagram;Schematic Diagram;Hierarchichal schematic structure;Documentation Standard(文档标准);Gate Symbols (门的符号);DeMorgan equivalent symbols(等效门符号（摩根定理）);Signal Names and Active Levels (信号名和有效电平);READY;Signal Name and Active Levels (信号名和有效电平);Bubble-to-Bubble Logic Design(“圈到圈”的逻辑设计);Bubble-to-Bubble Logic Design(“圈到圈”的逻辑设计);6.2 Circuit Timing (电路定时);Propagation Delay;Timing Diagram 定时图（时序图）;GO;6.2 Circuit Timing (电路定时);Commonly Used MSI Combinational Logic Device;De