摩尔定律和超越摩尔定律.pptxVIP

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  • 2016-08-01 发布于湖北
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摩尔定律和超越摩尔定律

Moore Vs More-Than-MooreStudent Number:M201472140 Name:辛超The main contentMoore’s Law and the tendency of CMOS scalingThe problem Moore’s Law and COMS scaling meetsMTM or othersWhat’s the Moore’s Law? Moore’s Law observation that ,over the history of computing hardware the number of transistors on integrated circuit doubles every two years. Describes a driving force of technological and social change in the late 20th and early 21st centuries. The period is often quoted as 18 months because of Intel executive David House, who predicted that chip performance would double every 18 months Gordon Moores original graph from 1965The tendency of semiconductors development The graphs tell us that the change tend of the degree of integration follow the Moore’s Law. At the same time,we can find that the feature size become small.In another weRd,enlargement of the degree of integration due to narrowof devices. yearSize(μm)20010.1820030.1520050.1320070.120090.0720110.05 Feature size change with time Feature size with yearsThe tendency of devices performance metricsTransistor density:promote2timesTransistor witching speed:promote more than 20%Transistor witch power:reduce more than 30%Source- drain leakage power :reduce more than5timesGate oxide leakage power:reduce more than10timesLimit of MOS Development of transistors3ASICsFirst generation VLSI system1Advanced technologyNew VLSI system0.3size/um0.1MOS0.03QED 0.010.0031990200020101980yearGateSourceDrainSubstrateWe can see that COMS scaling meets choke point with the re-duce of size. what’s the problem CMOS scaling meet?Gate stackTunneling current ? IOFF ?Gate depletion ? EOT ? Power ?S/D leakage current ? Gate leakage current ?Source/DrainParasitic resistance ?Doping level, abruptness Channel/DrainSurface scattering - mobility ?High E-field - mobility ? DIBL ? drain to source leakage IOFF ? Subthreshold slope ln(10)kT/q ? IOFF ?VG - VT decrease ? ION ?Intel repors:At gate lengths of 20 15 nm, the devices s

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