msp430adc10和adc12.ppt

#include msp4306638.h void main( ) { WDTCTL = WDTPW + WDTHOLD; ADC12CTL0 = ADC12SHT0_2 + ADC12ON; // 32个ADC12CLK, 打开ADC12 内核 ADC12IE = ADC12IE0; // 中断允许位 ADC12CTL0 |= ADC12ENC; // 转换允许位 P6SEL |= BIT0; // 选择A0通道 P1DIR |= BIT0; // P1.0 输出 while (1) { ADC12CTL0 |= ADC12SC; // 开始转换 __bis_SR_register(LPM0_bits + GIE); // LPM0, 打开全局中断 } } #pragma vector = ADC12_VECTOR __interrupt void ADC12_ISR(void) { switch(__even_in_range(ADC12IV,34)) { case 0: break; // Vector 0: No interrupt case 2: break; // Vector 2: ADC overflow case 4: break; // Vector 4: ADC timing overflow case 6: // Vector 6: ADC12IFG0 if (ADC12MEM0 = 2047) // ADC12MEM = A0 0.5AVcc? P1OUT |= BIT0; // P1.0 = 1 else P1OUT = ~BIT0; // P1.0 = 0 __bic_SR_register_on_exit(LPM0_bits); // Exit active CPU case 8: break; // Vector 8: ADC12IFG1 case 10: break; // Vector 10: ADC12IFG2 case 12: break; // Vector 12: ADC12IFG3 case 14: break; // Vector 14: ADC12IFG4 case 16: break; // Vector 16: ADC12IFG5 case 18: break; // Vector 18: ADC12IFG6 case 20: break; // Vector 20: ADC12IFG7 case 22: break; // Vector 22: ADC12IFG8 case 24: break; // Vector 24: ADC12IFG9 case 26: break; // Vector 26: ADC12IFG10 case 28: break; // Vector 28: ADC12IFG11 case 30: break; // Vector 30: ADC12IFG12 case 32: break;