MC_2013_11_Computer Architecture.pptVIP

Pipelining An instruction typically has many stages: FI - Fetch instruction Read next instruction into buffer DI - Decode instruction Determine opcode and operation specifiers CO - Calculate operands (i.e. EAs) Calc. effective address of each source operand (e.g. indirect addressing, register indirect, etc) FO - Fetch operands Fetch operands from memory (not necessary for those in registers) EI - Execute instructions Perform operation and store result WO - Write operand Write stored result to memory Overlap these operations An Example Sun Songlin Beijing University of Posts and Telecommunications * Measures of computational efficiency Could consider Number of additions Number of multiplications Amount of memory required Scalability and regularity For the present discussion we’ll focus most on number of multiplications as a measure of computational complexity More costly than additions for fixed-point processors Same cost as additions for floating-point processors, but number of operations is comparable TOP10 November 2012 1st: System Name: Titan Site: DOE/SC/Oak Ridge National Laboratory Computer: Cray XK7 , Opteron 6274 16C 2.200GHz, Cray Gemini interconnect, NVIDIA K20x Vendor: Cray Inc. Processor: AMD Opteron 6274 16C 2.200GHz Cores: 560640 Accelerator/Co-Processor Cores: 261632 Rpeak(GFlops): Rmax(GFlops): Sun Songlin Beijing University of Posts and Telecommunications * 2nd: System Name: Sequoia Site: DOE/NNSA/LLNL Computer: BlueGene/Q, Power BQC 16C 1.60 GHz, Custom Vendor: IBM Processor: Power BQC 16C 1.600GHz Cores: 1572864 Rpeak(GFlops): 2 Rmax(GFlops): Sun Songlin Beijing University of Posts and Telecommunications * 3th: System Name: K computer Site: RIKEN Advanced Institute for Computational Science (AICS) Computer: K computer, SPARC64 VIIIfx 2.0GHz, Tofu interconnect Vendor: Fujitsu Processor: SPARC64 VIIIfx 8C 2.000GHz Cores: 705024 Rpeak(GFlops): Rmax(GFlops): 8nd: