基于FPGA的電子时钟设计.docVIP

PAGE \* MERGEFORMAT1Civil Aviation University of China电子技术应用设计报告基于FPGA的电子时钟设计专 业： 通信工程 学 号： xxxxxxx 学生姓名： xxx 所属学院： 电信学院 任课教师： xxx 摘要本设计采用EDA技术，采用原理图和硬件描述语言VHDL混合编程设计时钟逻辑系统，在QuartusII5.0工具软件环境下，采用自顶向下的设计方法，由各个基本模块共同构建了一个基于FPGA的电子时钟。本时钟系统主芯片采用EP1C6Q240C8N，具有显示时间、日期、时间及日期校准、整点报时、定时闹钟等功能。其中时间采用24小时循环计数，日期计数器具有闰年、月大、月小的判断并准确计数功能。通过按键控制可以实现：日期和时间的切换显示、日期和时间的校准、闹钟的开关控制。关键词 ：FPGA；电子时钟；原理图；VHDL语言；AbstractIn my design EDA technology is used, and I designed the clock logic system by means of schematic and VHDL hardware description language. Under QuartusII5.0 Tools software environment, I used the top-down design methodology, where various basic modules work together to build a FPGA-based electronic clock.The main chip of the clock system is EP1C6Q240C8N, which has the function of time display, date display, time and date calibration, the whole point of time, and regular alarm clock. Furthermore, 24-hour cycle, date counter which time has leap-year, month, a small months judgment and accurate counting function are designed. What we can achieve through the control buttons are as follows: switching the display of date and time, calibration of date and time, and the alarm switch control.Keywords: FPGA; electronic clock; schematic; VHDL language;目录 TOC \o 1-3 \h \z \u HYPERLINK \l _Toc335401796 电子技术应用设计报告 PAGEREF _Toc335401796 \h 0 HYPERLINK \l _Toc335401797 基于FPGA的电子时钟设计 PAGEREF _Toc335401797 \h 0 HYPERLINK \l _Toc335401798 摘要 PAGEREF _Toc335401798 \h 1 HYPERLINK \l _Toc335401799 Abstract PAGEREF _Toc335401799 \h 1 HYPERLINK \l _Toc335401800 基于FPGA的电子时钟设计 PAGEREF _Toc335401800 \h 3 HYPERLINK \l _Toc335401801 1.FPGA介绍 PAGEREF _Toc335401801 \h 3 HYPERLINK \l _Toc335401802 2．电子时钟的设计方案 PAGEREF _Toc335401802 \h 3 HYPERLINK \l _Toc335401803 2.1时钟系统整体介绍 PAGEREF _Toc335401803 \h 3 HYPERLINK \l _Toc335401804 2.2分频器 PAGEREF _Toc335401804 \h 4 HYPERLINK \l _Toc335401805 2.3时间计数模块 PAGEREF _Toc335401805 \h 5 HYPERLINK \l