《EDA原理图输入设计方法.ppt

This is the end of Chapter 6!Thank you! 步骤8：设计顶层文件 (1) 仿照前面的“步骤2”，打开一个新的原理图编辑窗口 图6-20 在顶层编辑窗中调出已设计好的半加器元件 Evaluation only. Created with Aspose.Slides for .NET 3.5 Client Profile 5.2.0.0. Copyright 2004-2011 Aspose Pty Ltd. (2) 完成全加器原理图设计，并以文件名f_adder.gdf存在同一目录中。 (3) 将当前文件设置成Project，并选择目标器件为EPF10K10LC84-4。 (4) 编译此顶层文件f_adder.gdf，然后建立波形仿真文件。 图6-21 在顶层编辑窗中设计好全加器 Evaluation only. Created with Aspose.Slides for .NET 3.5 Client Profile 5.2.0.0. Copyright 2004-2011 Aspose Pty Ltd. (5) 对应f_adder.gdf的波形仿真文件，参考图中输入信号cin、bin和ain输入信号电平的设置，启动仿真器Simulator，观察输出波形的情况。 (6) 锁定引脚、编译并编程下载，硬件实测此全加器的逻辑功能。 图6-22 1位全加器的时序仿真波形 Evaluation only. Created with Aspose.Slides for .NET 3.5 Client Profile 5.2.0.0. Copyright 2004-2011 Aspose Pty Ltd. 6.1.2 设计流程归纳 图6-23 MAX+plusII一般设计流程 Evaluation only. Created with Aspose.Slides for .NET 3.5 Client Profile 5.2.0.0. Copyright 2004-2011 Aspose Pty Ltd. 6.1.3 补充说明 1. 编译窗口的各功能项目块含义 Compiler Netlist Extractor Database Builder Logic Synthesizer Partitioner Timing SNF Extractor Fitter Assembler 2. 查看适配报告 Evaluation only. Created with Aspose.Slides for .NET 3.5 Client Profile 5.2.0.0. Copyright 2004-2011 Aspose Pty Ltd. 6.2 2位十进制数字频率计设计 6.2.1 设计有时钟使能的两位十进制计数器 (1) 设计电路原理图。 图6-24 用74390设计一个有时钟使能的两位十进制计数器 Evaluation only. Created with Aspose.Slides for .NET 3.5 Client Profile 5.2.0.0. Copyright 2004-2011 Aspose Pty Ltd. (2) 计数器电路实现 图6-25 调出元件74390 图6-26 从Help中了解74390的详细功能 Evaluation only. Created with Aspose.Slides for .NET 3.5 Client Profile 5.2.0.0. Copyright 2004-2011 Aspose Pty Ltd. (3) 波形仿真 图6-27 两位十进制计数器工作波形 Evaluation only. Created with Aspose.Slides for .NET 3.5 Client Profile 5.2.0.0. Copyright 2004-2011 Aspose Pty Ltd. 6.2.2 频率计主结构电路设计 图6-28 两位十进制频率计顶层设计原理图文件 Evaluation only. Created with Aspose.Slides for .NET 3.5 Client Profile 5.2.0.0. Copyright 2004-2011 Aspose Pty Ltd. 图6-29 两位十进制频率计测频仿真波形 Evaluation only. Created with Aspose.Slides for .NET 3.5 Client Profile 5.2.0.0. Copyright 2004-2011 Aspose Pty Ltd. 6.2.3 测频时序控制电路设计 图6-30 测