cpe631ilp,dynamicexploitation.pptVIP

Jan, 2001 UAH-CPE631 CPE 631: ILP, Dynamic Exploitation Electrical and Computer EngineeringUniversity of Alabama in Huntsville Aleksandar Milenkovi? milenka@ /~milenka Outline Instruction Level Parallelism (ILP) Recap: Data Dependencies Extended MIPS Pipeline and Hazards Dynamic scheduling with a scoreboard ILP: Concepts and Challenges ILP (Instruction Level Parallelism) – overlap execution of unrelated instructions Techniques that increase amount of parallelism exploited among instructions reduce impact of data and control hazards increase processor ability to exploit parallelism Pipeline CPI = Ideal pipeline CPI + Structural stalls + RAW stalls + WAR stalls + WAW stalls + Control stalls Reducing each of the terms of the right-hand side minimize CPI and thus increase instruction throughput Two approaches to exploit parallelism Dynamic techniques largely depend on hardware to locate the parallelism Static techniques relay on software Techniques to exploit parallelism Where to look for ILP? Amount of parallelism available within a basic block BB: straight line code sequence of instructions with no branches in except to the entry, and no branches out except at the exit Example: Gcc (Gnu C Compiler): 17% control transfer 5 or 6 instructions + 1 branch Dependencies = amount of parallelism in a basic block is likely to be much less than 5= look beyond single block to get more instruction level parallelism Simplest and most common way to increase amount of parallelism among instruction is to exploit parallelism among iterations of a loop = Loop Level Parallelism Vector Processing: see Appendix G Definition: Data Dependencies Data dependence: instruction j is data dependent on instruction i if either of the following holds Instruction i produces a result used by instruction j, or Instruction j is data dependent on instruction k, and instruction k is data dependent on instruction i If dependent, cannot execute in parallel Try to schedule to avoid hazard