带有高阻态选通和复控位制的四选一多路选择器.docVIP

带有高阻态选通和复位控制的四选一多路选择器 LIBRARY IEEE;USE IEEE.STD_LOGIC_1164.ALL;ENTITY MUX41A ISPORT(A,B,C,D,RST,EN:IN STD_LOGIC;S1,S0:IN STD_LOGIC;Y:OUT STD_LOGIC);END ENTITY MUX41A;ARCHITECTURE ONE OF MUX41A ISSIGNAL S1S0:STD_LOGIC_VECTOR(1 DOWNTO 0);BEGINS1S0=S1S0;PROCESS(RST,EN,S1S0)BEGINIF RST=1 THEN Y=0;ELSIF EN=1 THENCASE S1S0 ISWHEN00=Y=A;WHEN01=Y=B;WHEN10=Y=C;WHEN11=Y=D;WHEN OTHERS=Y=NULL;END CASE;ELSE Y=Z;END IF;END PROCESS;END ARCHITECTURE ONE; 带有复位和时钟使能的4位加法二进制的计数器 library ieee; USE IEEE.STD_LOGIC_1164.ALL; USE IEEE.STD_LOGIC_UNSIGNED.ALL; ENTITY CNT4j IS PORT(RST,CLK,EN: IN STD_LOGIC; Q: OUT STD_LOGIC_VECTOR(3 DOWNTO 0); COUT: OUT STD_LOGIC); END; ARCHITECTURE ONE OF CNT4j IS BEGIN PROCESS(RST,CLK,EN) VARIABLE QQ:STD_LOGIC_VECTOR(3 DOWNTO 0); BEGIN IF RST=1 THEN QQ:=(OTHERS=0); ELSIF CLKEVENT AND CLK=1 THEN IF EN=1 THEN QQ:=QQ+1; IF QQ=1111 THEN COUT=1; ELSE COUT=0 ; END IF; END IF; END IF;Q=QQ; END PROCESS; END; 带有复位和时钟使能的4位减法二进制的计数器 LIBRARY IEEE; USE IEEE.STD_LOGIC_1164.ALL; USE IEEE.STD_LOGIC_UNSIGNED.ALL; ENTITY CNT4jian IS PORT(RST,CLK,EN: IN STD_LOGIC; Q: OUT STD_LOGIC_VECTOR(3 DOWNTO 0); COUT: OUT STD_LOGIC); END; ARCHITECTURE ONE OF CNT4jian IS BEGIN PROCESS(RST,CLK,EN) VARIABLE QQ:STD_LOGIC_VECTOR(3 DOWNTO 0); BEGIN IF RST=1 THEN QQ:=(OTHERS=0); ELSIF CLKEVENT AND CLK=1 THEN IF EN=1 THEN QQ:=QQ-1; IF QQ=0000 THEN COUT=1; ELSE COUT=0; END IF; END IF;END IF;Q=QQ;END PROCESS;END; 带有复位和时钟使能的4位加减可控二进制的计数器 LIBRARY IEEE; USE IEEE.STD_LOGIC_1164.ALL; USE IEEE.STD_LOGIC_UNSIGNED.ALL; ENTITY CNT4 IS PORT(RST,CLK,EN,UPDOWN: IN STD_LOGIC; Q: OUT STD_LOGIC_VECTOR(3 DOWNTO 0); COUT: OUT STD_LOGIC); END; ARCHITECTURE ONE OF CNT4 IS BEGIN PROCESS(RST,CLK,EN,UPDOWN) VARIABLE QQ:STD_LOGIC_VECTOR(3 DOWNTO 0); BEGIN IF RST=1 THEN QQ:=(OTHERS=0); ELSIF CLKEVENT AND CLK=1 THEN IF EN=1 THEN IF UPDOWN=1 THEN QQ:=QQ+1; IF QQ=1111 THEN COUT=1; ELSE COUT=0 ;END IF; ELSE QQ:=QQ-1; IF QQ=0000 THEN COUT=1; ELSE