Reducing Energy in FPGA Multipliers Through Glitch Reduction减少能源在FPGA乘法器通过减少故障.pptVIP

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Reducing Energy in FPGA Multipliers Through Glitch Reduction减少能源在FPGA乘法器通过减少故障.ppt

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Reducing Energy in FPGA Multipliers Through Glitch Reduction减少能源在FPGA乘法器通过减少故障

Reducing Energy in FPGA Multipliers Through Glitch Reduction FPGAs’ High Power Consumption Flexibility and reprogrammability result in greater power consumption relative to ASICs Static power is insignificant compared to dynamic power consumption Dynamic power consumption: Pavg = ? Σ Cn·fn·V2 FPGAs’ High Power Consumption fn term represents the net switching activity Some net switching activity is unproductive: glitches Large amount of dynamic switching power wasted in glitches Goal: Lower energy by reducing the amount of glitching FPGA Glitching Example FPGA Glitching Example FPGA Glitching Example FPGA Glitching Example FPGA Glitching Example Power Classification Design Static Power: divide the total static power of the device by the relative size of the circuit Total Static Power / (Circuit LUTs / Total LUTs) Dynamic Glitching Power: % of signal glitches to total transitions is used to divide dynamic power into dynamic glitching and useful dynamic power Useful Dynamic Power: the “useful” transitions of the circuit Reduce Glitches with Pipelining Pipelined designs have less logic and interconnect between registers Pipelining causes long routes to be broken up Pipelining in FPGAs can come at little additional cost Pipelined Multiplier Long carry chain paths of multiplier stages are ideal for pipelining Pipelining gradually inserted in multipliers of different bit widths: 4x4 8x8 16x16 32x32 Multiplier Power Classification Reduce Glitches with Pipelining Extreme Pipelining: Digit-Serial In an FPGA an NxN array multiplier can have N pipeline stages A digit-serial multiplier provides pipelining at a smaller granularity Digit-serial operations can increase throughput – but also increase latency Different digit sizes of digit-serial multiplier used: 1, 2, 4, 8, 16, 32 Pipelined vs. Digit-Serial Multiplier: Total Power Consumption Operation Energy Most studies focus on quantifying circuit design power only – often energy is a more useful metric Four metri