电子科技大学“数字逻辑设计及应用”数字逻辑8-1.pptVIP

* * Chapter 8 Sequential logic design practices Design with IC blocks : DFF and JKFF DFF Blocks 4 DFF 6 DFF 8 DFF JKFF Blocks Design with IC blocks Design with IC blocks Design with IC blocks Basic unit：Mode 2 counter Binary counter Ripple Binary counter Binary counter Ripple Binary counter Binary counter Control and final state Ascending up Descending down Binary counter Mode N*M counter Binary counter MSI Counters Input port ENP: enable for state change ENT: enable for state change When ENT=0, RCO=0 Output port Initial state:000