數字滤波器设计稿译文原文毕业设计稿（专业论文）.docxVIP

附件D： FPGA IMPLEMENTATION OF DIGITAL FILTERS Chi-Jui Chou, Satish Mohanakrishnan, Joseph B. Evans Telecommunications Information Sciences Laboratory Department of Electrical Computer Engineering University of Kansas Lawrence, KS 66045-2228 ABSTRACT Digital filtering algorithms are most commonly implemented using general purpose digital signal processing chips for audio applications, or special purpose digital filtering chips and application-specific integrated circuits (ASICs) for higher rates. This paper describes an approach to the implementation of digital filter algorithms based on field programmable gate arrays (FPGAs).The advantages of the FPGA approach to digital filter implementation include higher sampling rates than are available from traditional DSP chips,lower costs than an ASIC for moderate volume applications, and more flexibility than the alternate approaches. Since many current FPGA architectures are in-system programmable, the configuration of the device may be changed to implement different functionality if required. Our examples illustrate that the FPGA approach is both flexible and provides performance comparable or superior to traditional approaches. 1. INTRODUCTION The most common approaches to the implementation of digital filtering algorithms are general purpose digital signal processing chips for audio applications, or special purpose digital filtering chips and application-specific integrated circuits (ASICs)for higher rates [9, 14]. This paper describes an approach to the implementation of digital filter algorithms on field programmable gate arrays (FPGAs).Recent advances in FPGA technology have enabled these devices to be applied to a variety of applications traditionally reserved for ASICs. FPGAs are well suited to datapath designs,such as those encountered in digital filtering applications. The density of the new programmable devices is such that a nontrivial number of arithmetic operations such as those encountered in digital filterin