基于薄外延技术的高压BCD兼容工艺.pdfVIP

第28卷第11期 2007年11月 半导体学报 CHINESE JoURNAL oF SEMICoNDUCToRS V01．28 No．11 Nov．，2007 A High Voltage BCD Process Using Thin Epitaxial Technology’ Qia0 Min91”，Xia0 Zhiqian92，Fang Jianl， He Zhongb02，Duan Mingweil， Zheng Xinl，Zhou Xiandal，Xu Jingz， Zhang B01，and Li Zhaojil (1 State Key Laboratory ofElectronic Thin Films and Integrated Devices，University ofElectronic Science and Technology，Chengdu 610054，China) (2 The 58 th Research Institute，China Electronics Technology Group Corporation，Wuxi 214035，China) Abstract：A high voltage BCD process using thin epitaxial technology is developed for high voltage applications． Compared to conventional thick expitaxial technology．the thickness of the n·type epitaxial layer is reduced to 9肛m，and the diffusion processing time needed for forming junction isolation diffusions is substantially reduced． The isolation diffusions have a smaller lateral extent and occupy less chip area．High voltage double RESURF LD— MoS with a breakdown voltage of up to 900V，as well as low voltage CMOS and BJT，are achieved using this high voltage BCD compatible process．An experimental high voltage half bridge gate drive IC using a coupled level shift structure is also successfully implemented。and the high side floating offset voltage in the half bridge drive IC is 880V．The major features of this process for high voltage applications are also clearly demonstrated． Key words：BCD process；thin epitaxial technology double RESURF；LDMOS EEACC：2560P；2570P CLC nnnlber：TN4 Document code：A Article ID：0253-4177(2007)11-1742．06 1 Introduction The bipolar CMOS DMOS(BCD)process， which was introduced twenty years ago，is an im． portant mixed technology that allows the integra- tion on a single chip of bipolar linear，CMOS log- ic，and double—diffusion MOSFET(DMoS)power functionsEl,2J．In recent years。the multiple discrete components in high voltage IC applications have been reduced through their integration into a BCD process．The integration of discrete elements provide improved p