用于PDP扫描驱动芯片的低成本VDMOS及其兼容工艺.pdfVIP

第 28卷第 11 期 2007 年 11 月 半导体学报 Vol. 28 No.ll Nov. ,2007 CHINESE JOURNAL OF S巴MICONDUC丁ORS Cost-Effective VD民10S and Compatible Process for PDP Scan-Driver IC 赞 Li Xiaoming t , Zhuang Yiqi, Zhang Li, and Xin Weiping (Key Laboratory 01 the Mínístry 01剧ucation lor Wíde Band-Gap Semiconductor Materials and Devi俐， Microelectronics lnstitute , Xidian University ， 刀 ， an 710071 , China) Abstract; A VDMOS integrated in a 170V scan-dríver chip of a plasma display panel (PDP) is described ,which is based on epitaxial bipolar-CMOS-DMOS (BCD) technology. Some key considerations and parameters of the design are discussed. The thickness of epitaxial layer is 17μm ， the area of a single VDMOS structure ωII is 324μm2 ， and only 18 photoetching steps are needed in the development process. It is also compatible with standard CMOS , bipo- lar ,and p-LDMOS devices. The breakdown voltage of VDMOS ín the process control module (PCM) is more than 200V. Five kinds of VDMOS modules are integrated in 64 channel PDP scan精driver IC ,and or卜line system verifica- tion is done on a LG-model-42v6 PDP. Key words: PDP, VDMOS, BCD process; cost-effective; structure cell EEACC: 2560P; 2670P CLC number: TN402 Documenl code: A Article ID: 0253-4177(2007)12-1679-06 1 Introduction PDP is currently one of the main display de- vices and will remain competitive in the fu- ture[l-3]. The high-voltage driver chip in PDP products is always an in:申ortant element in lower唰 ing its cost and improving its competitiveness. Several different technological routes and their roadmaps developed concurrently for their respec- tive driver chips[4-叫. Silicon epitaxial BCD tech- nology is a popular technology for its perfect com- promise of performance and cost , which is quite suitable for a competitive PDP product. VDMOS is usually integrated as the chip multi-output part for its power capability , and plays a leading role in the trends of high definition PDP development because more 自 power outputs are