bit error rate analysis of cactus technologies sd card products（cactus sd卡产品的比特误码速率分析—外文翻译学位论文.docVIP

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bit error rate analysis of cactus technologies sd card products（cactus sd卡产品的比特误码速率分析—外文翻译学位论文.doc

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bit error rate analysis of cactus technologies sd card products（cactus sd卡产品的比特误码速率分析—外文翻译学位论文

Bit Error Rate Analysis of Cactus Technologies SD Card Products 1.Introduction Cactus Technologies products are built using only the highest quality SLC (Single Level Cell) NAND flash devices. However, similar to hard disk media, NAND flash media is not perfect and soft errors will inevitably occur during usage. Various published papers have shown that the raw BER (Bit Error Rate) of SLC NAND is in the range of 1E-9 to 1E-11. While this is quite good and significantly better than that of MLC (Multi Level Cell) NAND, many pplications require BERs that are on par with, or better than those provided by traditional hard disk drives, which typically has BERs in the range of 1E-15. Fortunately, the soft error mechanisms in SLC NAND are well understood and can be easily compensated for with the use of a robust ECC. In this paper, we will provide a brief analysis of the BER of Cactus SD Card products and show how the strong built-in ECC in the controller is able to provide typical application BERs that can match or even surpass that of typical hard disk drives. 2.The Problem Bit disturb phenomena is inherent to the NAND Cactus Technologies Limited ash architecture.There are three basic causes of such bit disturbs: ● Program disturb ● Read disturb ● Charge leakage Program disturb occurs when unselected cells are exposed to high voltages when neighboring cells are being programmed.The result of this inadvertent exposure to high voltages is that the affected cell appears slightly programmed. Read disturb occurs when unselected cells are exposed to normal operating voltages when neighboring cells are being read. The result of this is the affected cell appears slightly programmed.Due to the much lower voltages used during read operations, read disturb effects are much weaker than those of program disturb. Charge leakage occurs because the stored charge on the floating gate of the flash cell will slowly leak away over time, thus causing a programmed cell to