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哈尔滨工业大学（威海）本科毕业设计（论文） PAGE II - - -  PAGE 42 - 论文题目 摘要 Philips 开发的I2C 总线是一个简单的双向串行总线，能实现有效的IC之间控制, 所有符合I2C总线的器件组合了一个片上接口，使器件之间直接通过I2C 总线通讯。因而解决了很多在设计数字控制电路时遇到的接口问题。Wishbone 总线最先是由Silicon公司提出，它通过在IP核之间建立一个通用接口完成互连,优势是处理器核与外设共享总线。本文介绍了I2C总线和wishbone总线协议, 通过设计一个基于片上系统的Wishbone总线的I2C控制器核心与带外设的I2C总线相连接，从而达到总线互联通信的目的。从I2C总线入手，通过Verilog语言对其寄存器堆的读写操作进行编译并编写测试代码，使用ModelSim软件进行仿真验证，对设计的I2C控制器进行波形仿真，验证了各个模块的功能和工作状态，仿真了执行过程和波形输出??情况。 关键词：I2C总线、Wishbone总线、寄存器、Verilog语言、波形仿真 Abstract With the development of micro electric and EDA(electronic design automation)technology, FPGA(field programmable gates array) can realize the function of digital circuit system design .FPGA have the merit of filed programmability and High integration rate ,therefore is highly recognized for engineering.I2C bus is widely applied in the digital system as simple interface ,expedient use ,low cost and good expansibility .VHDL is considered as a core of digital system design and a key technique of implement digital system. The design realizes the function of I2C bus interface on the FPGA .At first the thesis deeply research I2C bus specification ,then briefly introduce the Quartus II design environment and the design method ,as well as FPGA design flow .In this foundation,I2C bus controller design scheme and the timing simulation under Quartus II is particularly introduced. Key words Quartus II;I2C bus controller ;FPGA ;timing simulation 目 录  TOC \o 1-3 \h \z \u  HYPERLINK \l _Toc23016 摘 要  PAGEREF _Toc23016 I  HYPERLINK \l _Toc6188 Abstract  PAGEREF _Toc6188 II  HYPERLINK \l _Toc27827 第1章 绪论  PAGEREF _Toc27827 5  HYPERLINK \l _Toc3030 1.1 课题背景  PAGEREF _Toc3030 5  HYPERLINK \l _Toc14393 1.2 I2C总线的产生及发展  PAGEREF _Toc14393 6  HYPERLINK \l _Toc13793 1.3 FPGA的现状与展望  PAGEREF _Toc13793 6  HYPERLINK \l _Toc5092 1.4 相关工作  PAGEREF _Toc5092 6  HYPERLINK \l _Toc5780 第2章 I2C总线技术的研究  PAGEREF _Toc5780 8  HYPERLINK \l _Toc4936 2.1 I2C总线的概念  PAGEREF _Toc493