基于FPGA的通用外设电路毕业论文40论文41.docVIP

 PAGE \* MERGEFORMAT 2 (此文档为word格式，下载后您可任意编辑修改！) 毕业设计（论文） 题 目：基于FPGA的通用外设电路设计 英文题目：Design of Universal Peripheral Circuit Based on FPGA 摘 要 FPGA器件作为可编程逻辑主流硬件，近年来，应用越来越广泛，在现代科学技术中占有举足轻重的作用和地位。其外设电路作为芯片与外界输入方式之一，是十分具有研究价值的。FPGA器件不断增加新的模块，功能越来越强大，基于FPGA的外设电路也顺应形势，不断升级。 本设计综合行列式键盘、LED显示器、时钟一体，应用Verilog HDL语言实现下述功能：计时功能，包括时分秒的计时；校时功能：对时分秒手动调整以校准时间；键盘功能：应用4*4行列式键盘，可实现0-9数字的直接输入；LED动态扫描显示和闪烁，移位，灭零等功能，突出了其作为硬件描述语言的良好的可读性、可移植性和易理解等优点，并通过Altera QuartusⅡ8.0完成综合、仿真。 本设计实现以上FPGA各功能，可作为EDA技术发展的价值体现。此程序通过下载到FPGA芯片后,可应用于实际的数字钟显示中。 关键字：行列式键盘、LED显示器、时钟、Verilog HDL。 东华理工大学毕业（设计）论文 Abstract ABSTRACT FPGA programmable logic devices, as the mainstream of recent years, more and more extensive applications in modern science and technology plays a vital role and status. Its peripheral circuit chip with the outside world as one of input is very valuable in research. FPGA devices are constantly adding new modules, more powerful, FPGA-based response to the peripheral circuit is also the situation escalated. The determinant of the design of an integrated keyboard, LED display, integrated clock, application Verilog HDL language to achieve the following functions: time functions, including the time when minutes and seconds; school functions: every minute of time to manually adjust the calibration time; keyboard functions: application of 4 * 4 determinant keyboard, numbers 0-9 can be directly imported; LED dynamic scanning display and blinking, shift, such as anti-zero function, language as a good readability, easy to understand the advantages of portability, and Altera Quartus Ⅱ 8.0 through the completion of synthesis, simulation. FPGA Design and Implementation of the above various functions, can be used as the value of EDA technology embodied. This process by downloading to the FPGA chip can be used in practical digital clock display. Keywords: determinant keyboard, LED display, clock, Verilog HDL. 东华理工大学毕业（设计）论文