netX_50_Datenblatt_10-2009_V6_GB-netX50–networXon.PDFVIP

netX 50 – networX on chip The future of communication Description n Flexible “high end” network controller with host interface or single chip solution for digital I/Os n Two communication channels Supported as Real-Time Ethernet with Real-Time-Ethernet-Systeme PHY or fieldbus n New system architecture optimized for communication and high data throughput n 32-Bit / 200 MHz CPU ARM 966 with 112 KB SRAM / 64 KB ROM and extensive periphery n Dual-Port-Memory, Extension bus or digital I/Os n IO-Link Controller, 8 channels n CCD-Sensor Controller The netX is a highly integrated network controller tecture with only one common data bus and addi- with a new system architecture optimized for com- tional bus allocation cycles. munication and maximum data throughput. The controllers of the two communication chan- Via an integrated dual-port memory it works as an nels are structured on two levels and are identical companion chip to a host CPU and realises the to each other. They consist of dedicated ALUs and complete scope of industrial communication from special logic units that receive their protocol func- Supported Fieldbus-Systems fieldbus systems up to the Real-Time Ethernet tions via Microcode. For Ethernet the PHYs are Master only systems. Allows the application no own CPU the integrated which means tha