Dual Super-Systolic Core for Real-Time Reconstructive Algorithms of High-Resolution RadarSAR Imaging Systems.docVIP
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Dual Super-Systolic Core for Real-Time Reconstructive Algorithms of High-Resolution RadarSAR Imaging Systems
Sensors 2012, 12, 2539-2560; doi:10.3390/s120302539
OPEN ACCESS
sensors
ISSN 1424-8220
/journal/sensors
Article
Dual Super-Systolic Core for Real-Time Reconstructive
Algorithms of High-Resolution Radar/SAR Imaging Systems
Alejandro Castillo Atoche 1,* and Javier Vázquez Castillo 2
1
Department of Mechatronics, Autonomous University of Yucatan, Av. Industrias No Contaminantes
s/n, Cordemex, 97203, Merida, Yuc., Mexico
2
Science and Engineering Division, University of Quintana Roo, Boulevard Bahia s/n, Chetumal,
QRoo 77010, Mexico; E-Mail: jvazquez@uqroo.mx
* Author to whom correspondence should be addressed; E-Mail: acastill@uady.mx;
Tel.: +52-999-930-0550; Fax: +52-999-930-0559.
Received: 3 December 2011; in revised form: 26 January 2012 / Accepted: 21 February 2012 /
Published: 24 February 2012
Abstract: A high-speed dual super-systolic core for reconstructive signal processing (SP)
operations consists of a double parallel systolic array (SA) machine in which each
processing element of the array is also conceptualized as another SA in a bit-level fashion.
In this study, we addressed the design of a high-speed dual super-systolic array (SSA) core
for the enhancement/reconstruction of remote sensing (RS) imaging of radar/synthetic
aperture radar (SAR) sensor systems. The selected reconstructive SP algorithms are
efficiently transformed in their parallel representation and then, they are mapped into an
efficient high performance embedded computing (HPEC) architecture in reconfigurable
Xilinx field programmable gate array (FPGA) platforms. As an implementation test case,
the proposed approach was aggregated in a HW/SW co-design scheme in order to solve the
nonlinear ill-posed inverse problem of nonparametric estimation of the power spatial
spectrum pattern (SSP) from a remotely sensed scene. We show how such dual SSA core,
drastically reduces the computational load of complex RS
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