s12X系列单片机内存页及Xgate介绍.ppt

* * * * Here we can see the impact of the XGATE’s RISC architecture. It takes about 30% more bytes to implement the same piece of C. Note that since this is a true 16-bit architecture the number of opcodes is half of this number. The XGATE cycle count is shown in true XGATE cycles which execute in half the time of the CPU’s cycles, therefore true time taken is less than half. Note that XGATE cycle execution is increased due to the number of accesses to external peripherals which are slower than RAM access and the large number of byte loads and stores in the assembly code. * * In this case the XGATE suffers from the lack of a divide instruction to speed up the mathematics * * * * * * * -Map:?Define mapping for memory space 0x4000-0x7FFF Group CODE GENERATION Scope Application Syntax -Map(RAM|FLASH|Exernal) Arguments RAM: accesses to 0x4000–0x7FFF will be mapped to 0x0F_C000-0x0F_FFFF in the global memory space (RAM area). FLASH: accesses to 0x4000–0x7FFF will be mapped to 0x7F_4000-0x7F_7FFF in the global memory space (FLASH). External: accesses to 0x4000–0x7FFF will be mapped to 0x14_4000-0x14_7FFF in the global memory space (external access). Default FLASH Defines None Pragmas None Description This option sets the memory mapping for addresses between 0x4000 and 0x7FFF for HCS12XE. This mapping is determined by the? MMC control register (the ROMHM and RAMHM bits)?and the compiler must be aware of the current setting to correctly perform address translations. Example ????? -MapRAM * * * * * * * * * No multiply or divide but of course these are available in the C implementation. * * * * * NOTICE that PAGE E0 is not completely included in the XGATE MAP. Mention that FLASH is ALWAYS fixed at those addresses RAM’s bottom will ALWAYS be mapped to 0xF_FFFF and will grow upwards up to a limit of 32 K. In this case XEP100 has 32K of RAM. Refer to your device’s overview in the datasheet manual. * * Emphasize here that we are now working with two cores and there are CPU