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FTM,(国外英文资料)
FTM,(国外英文资料)
FTM function,
The FTM module clock
FTM module is the core of a 16-bit counter, the counter clock source can be set (set by the CLKS FTMx_SC registers), can come from the bus clock (CLKS = 01), also can come from MCG MCGFFCLK module, the clock source for frequency division (set by the PS FTMx_SC register).
If you use a fixed frequency clock, or fixed frenquency clock, or MCGFFCLK, you need to set it in the MCG module. MCG MCGFFCLK, provided by the module can provide other on-chip peripheral devices with clock, the clock can be provided by the slow internal reference clock or external crystals, and provided by the FLL points after the frequency. MCGFFCLK is set from the C1_IREFS bit from the inside 32K or from the outside FDIV to the FDIV, the output to MCGFFCLK is twice as long.
MCGFFCLK is used for local bus clock synchronization and must not be greater than 1/8 of MCGOUTCLK. The clock is invalid under the BLPI mode and STOP mode in MCG.
It is.
In general, we will use the Bus Clock to provide the Clock for FTM as long as it is not a function of external counting.
The count pattern of the FTM module
The FTM module, after the clock is determined, counts the counter, and by default, the input clock is incremented and unsigned. The counter initial value is specified by FTMx_CNTIN. The TOF position is when the set value of the FTMx_MOD register is always counted. The counter goes back to the original value and repeats. As shown below, the counter counts from 0 to 3, and the loop count. The counting period = (MOD - CNTIN + 1) * clock cycle.
The initial value is also negative, such as CNTIN = 0xFFFC (pc-4), MOD = 4, and the counter counts from -4 to 4, and the loop count. When CNTINs highest level, CNTIN [15] = 1, the initial value is treated as a negative, otherwise it is considered a positive number.
The FTM count suggests that the MOD value must be greater than the CNTIN value and be noted for programming. If MOD = = CNTIN, the value is always the MOD value
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