第二章MCU简介与最小系统.pptVIP

　　 Freescale HCS12系列MCU的命名规则 HCS12各子系列MCU简介 　　 HCS12X系列MCU与HCS12系列MCU的主要差异 典型HCS12X系列MCU简介 　　 XDP512,CPU12 Reference Manual HCS12 Building Blocks HCS12 电源 An example CRG（时钟复位单元） XTAL、EXTAL、XFC S12 Oscillator Layout Phase Lock Loop Self Clock Mode 无需外部参考时钟 由压控振荡器VCO的最小输出频率fSCM决定 不同器件，不同工作环境下fSCM差异很大 应该仅作为一种安全防范措施 在外部时钟恢复稳定后会自动退出SCM模式 Clock Quality Check Clock Quality Check比Clock monitor更准确 Clock Quality Check用于检查外部时钟是否稳定，而不仅仅是外部时钟的有无 Clock Quality Check在下列条件下启动： 1： 上电复位 2： 低电压复位 3： 从STOP模式唤醒 4： 发生CMFail事件 复位信号 复位时序 COP/Clock monitor Resets External Resets MCU的工作模式 　　 2.4 MC9S12DG128 的存储器映像 　　 Digital I/O pins IO is the basic means to control and monitor external hardware Usually, digital IO pins Grouped into ports of 8 pins Are bi-directional (both input and output) Always shared the pins with other peripherals Digital IO is running with registers Data direction register (DDR) Port register (PT) Port Input register (PTI) Other setting register (key wakeup, pull-up ) Digital I/O pins Data direction register (DDR) Read/write Specifies for each bit the corresponding pin as input or output function Port register (PT) Read/write Specifies for output pin whether the output is high/low Specifies the high/low status on the input pin Port input register (PTI) Read only Contains the current value of all pins (input and output) Why need PTI? GPIO IO input Shared function GPIO control registers Typical BDM System Only BKGD and GND are required, others are optional. - Reset would allow host to reset the target system. - Vdd would allow pod to “steal” power from the target system. Vpp is not needed in any current HCS12 systems. 注意： 一定不能插反！！！ Host PC RS232 RxD TxD GND Interface Pod Custom BDM Serial Target System BKGD unused (Vpp) GND Vdd RESET Reset BDM Be careful to the direction of the BDM! BDMIN Reset RS-232 Driver 最小系统 提纲 ? HCS12系列MCU概述 ? HCS12X系列MCU概述 ? MC9S12DG128 MCU及其最小系统 ? MC9S12DG128的存储器映像 ? MC9S12DG128 MCU的并行I/O端口 提纲 ? HCS12系列MCU概述 ? HCS12X系