FPGA软核、硬核以及固核的概念(国外英语资料).doc

FPGA软核、硬核以及固核的概念(国外英语资料) Soft core, hard core and fixed core concept Todays FPGA design is huge and complex, so its impractical to start every part of the design from scratch. One solution is to reuse the existing functional modules for the more general part, while the main time and resources are used in the design of those entirely new, unique parts. Its like when youre developing an application, you dont have to write directly the code that drives the physical hardware, but you simply call the Windows provided by API. IP (Intelligent Property) is a nuclear integrated circuit core which has the core of intellectual property rights, after repeated verification, the macro module has a specific function, has nothing to do with the chip manufacturing process, can be ported to different processes in semiconductor. In the SOC phase, IP nuclear design has become an important task for ASIC circuit design companies and FPGA providers, and is also the embodiment of their strength. For FPGA development software, the IP kernel is provided The more abundant, the more convenient the users design, and its market occupancy rate is higher. At present, the IP kernel has become the basic unit of system design and has been exchanged, transferred and sold as independent design results. From the way of providing the IP core, it is usually divided into 3 categories: soft core, solid core and hard core. From the cost of completing the IP kernel, the core is the most expensive; from the use of flexibility, the reuse of the soft core is the highest. Compared with the soft core implementation, the hard core can reduce power consumption by 5~10 times and save nearly 90% of the logical resources. 1. soft core (Soft IP Core) Soft core in the field of EDA design refers to the previous register transfer level (RTL) model; in FPGA design, it refers to the hardware language description of the circuit, including logical description, netlist and help documents. Soft core only through functional simu