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IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, VOL. 16, NO. 9, SEPTEMBER 2008 1127 Static and Dynamic Temperature-Aware Scheduling for Multiprocessor SoCs ˇ ´ Rosing, Member, IEEE, Ayse Kıvılcım Coskun, Student Member, IEEE, Tajana Simunic ¸ ¸ Keith A. Whisnant, Member, IEEE, and Kenny C. Gross, Member, IEEE Abstract— Thermal hot spots and high temperature gradients scheduling in MPSoCs, we introduce an adaptive technique, degrade reliability and performance, and increase cooling costs which can achieve low and stable temperature profiles without and leakage power. In this paper, we explore the benefits of temper- noticeable impact on performance. ature-aware task scheduling for multiprocessor system-on-a-chip (MPSoC). We evaluate our techniques using workload character- Thermal hot spots increase cooling costs, negatively impact istics collected from a real system by Sun’s Continuous System reliability and degrade performance. The significant increase in Telemetry. We first solve the task scheduling problem statically cooling costs requires designing for temperature margins that using integer linear programming (ILP). The ILP solution is are lower than the worst-case. Hot spots accelerate failure mech- guaranteed to be optimal for the given assumptions for tasks. anisms such as electromigration, stress migration, and dielec- We formulate ILPs for minimizing energy, balancing energy, and