时钟与控制系统.pptVIP

struct PCLKCR_BITS { // bits description Uint16 EVAENCLK:1; // 0 Enable high speed clk to EV-A Uint16 EVBENCLK:1; // 1 Enable high speed clk to EV-B Uint16 rsvd1:1; // 2 Uint16 ADCENCLK:1; // 3 Enable high speed clk to ADC Uint16 rsvd2:4; // 7:4 reserved Uint16 SPIENCLK:1; // 8 Enable low speed clk to SPI Uint16 rsvd3:1; // 9 reserved Uint16 SCIENCLKA:1; // 10 Enable low speed clk to SCI-A Uint16 SCIENCLKB:1; // 11 Enable low speed clk to SCI-B Uint16 MCBSPENCLK:1; // 12 Enable low speed clk to McBSP Uint16 rsvd4:1; // 13 reserved Uint16 ECANENCLK:1; // 14 Enable system clk to eCAN }; union PCLKCR_REG { Uint16 all; struct PCLKCR_BITS bit; }; struct HISPCP_BITS { // bits description Uint16 HSPCLK:3; // 2:0 Rate relative to SYSCLKOUT Uint16 rsvd1:13; // 15:3 reserved }; union HISPCP_REG { Uint16 all; struct HISPCP_BITS bit; }; // Low speed peripheral clock register bit definitions: struct LOSPCP_BITS { // bits description Uint16 LSPCLK:3; // 2:0 Rate relative to SYSCLKOUT Uint16 rsvd1:13; // 15:3 reserved }; union LOSPCP_REG { Uint16 all; struct LOSPCP_BITS bit; }; // System control and status register bit definitions: struct SCSR_BITS { // bits description Uint16 WDOVERRIDE:1; // 0 Allow watchdog disable Uint16 WDENINT:1; // 1 Enable/disable WD interrupt Uint16 rsvd1:14; // 15:2 reserved }; union SCSR_REG { Uint16 all; struct SCSR_BITS bit; }; struct SYS_CTRL_REGS { Uint16 rsvd1[10]; // 0-9 union HISPCP_REG HISPCP; // 10: High-speed peripheral clock pre-scaler union LOSPCP_REG LOSPCP; // 11: Low-speed peripheral clock pre-scaler union PCLKCR_REG PCLKCR; // 12: Peripheral clock control register Uint16 rsvd2;