协议详细介绍.pptVIP

  1. 1、本文档共31页,可阅读全部内容。
  2. 2、原创力文档(book118)网站文档一经付费(服务费),不意味着购买了该文档的版权,仅供个人/单位学习、研究之用,不得用于商业用途,未经授权,严禁复制、发行、汇编、翻译或者网络传播等,侵权必究。
  3. 3、本站所有内容均由合作方或网友上传,本站不对文档的完整性、权威性及其观点立场正确性做任何保证或承诺!文档内容仅供研究参考,付费前请自行鉴别。如您付费,意味着您自己接受本站规则且自行承担风险,本站不退款、不进行额外附加服务;查看《如何避免下载的几个坑》。如果您已付费下载过本站文档,您可以点击 这里二次下载
  4. 4、如文档侵犯商业秘密、侵犯著作权、侵犯人身权等,请点击“版权申诉”(推荐),也可以打举报电话:400-050-0827(电话支持时间:9:00-18:30)。
  5. 5、该文档为VIP文档,如果想要下载,成为VIP会员后,下载免费。
  6. 6、成为VIP后,下载本文档将扣除1次下载权益。下载后,不支持退款、换文档。如有疑问请联系我们
  7. 7、成为VIP后,您将拥有八大权益,权益包括:VIP文档下载权益、阅读免打扰、文档格式转换、高级专利检索、专属身份标志、高级客服、多端互通、版权登记。
  8. 8、VIP文档为合作方或网友上传,每下载1次, 网站将根据用户上传文档的质量评分、类型等,对文档贡献者给予高额补贴、流量扶持。如果你也想贡献VIP文档。上传文档
查看更多
协议详细介绍

Thank you! MIPI Protocol Introduction MIPI Development Team 2010-9-2 What is MIPI? MIPI stands for Mobile Industry Processor Interface MIPI Alliance is a collaboration of mobile industry leaders. Objective to promote open standards for interfaces to mobile application processors. Intends to speed deployment of new services to mobile users by establishing Spec. Board Members in MIPI Alliance Intel, Motorola, Nokia, NXP,Samsung, ST, TI What is MIPI? MIPI Alliance Specification for display DCS (Display Command Set) DCS is a standardized command set intended for command mode display modules. DBI, DPI (Display Bus Interface, Display Pixel Interface) DBI:Parallel interfaces to display modules having display controllers and frame buffers. DPI:Parallel interfaces to display modules without on-panel display controller or frame buffer. DSI, CSI (Display Serial Interface, Camera Serial Interface) DSI specifies a high-speed serial interface between a host processor and display module. CSI specifies a high-speed serial interface between a host processor and camera module. D-PHY D-PHY provides the physical layer definition for DSI and CSI. DSI Layers DCS spec DSI spec D-PHY spec Outline D-PHY Introduction Lane Module, State and Line levels Operating Modes Escape Mode System Power States Electrical Characteristics Summary Introduction for D-PHY D-PHY describes a source synchronous, high speed, low power, low cost PHY A PHY configuration contains A Clock Lane One or more Data Lanes Three main lane types Unidirectional Clock Lane Unidirectional Data Lane Bi-directional Data Lane Transmission Mode Low-Power signaling mode for control purpose:10MHz (max) High-Speed signaling mode for fast-data traffic:80Mbps ~ 1Gbps per Lane D-PHY low-level protocol specifies a minimum data unit of one byte A transmitter shall send data LSB first, MSB last. D-PHY suited

文档评论(0)

hello118 + 关注
实名认证
文档贡献者

该用户很懒,什么也没介绍

1亿VIP精品文档

相关文档