FPGA_IP核设计与应用综述.docVIP

摘要 随着电子技术的飞速发展，在PAL、GAL、EPLD等可编程器件的基础上进一步发展FPGA(Field Programmable Gate Array)即现场可编程门阵列。它是作为专用集成电路(ASIC)领域中的一种半定制电路而出现的，既解决了定制电路的不足，又克服了原有可编程器件门电路数有限的缺点。FPGA在通信、数据处理、网络、仪器、工业控制、军事和航空航天等众多领域得到了广泛应用。如何实现快速的时序收敛、降低功耗和成本、优化时钟管理并降低FPGA与PCB并行设计的复杂性等问题，一直是采用FPGA的系统设计工程师需要考虑的关键问题。如今，随着FPGA向更高密度、更大容量、更低功耗和集成更多IP的方向发展超大规模集成电路(VLS I) 工艺的进一步迅猛发展，片上系统 SoC (system on a chip ) 的规模越来越大由此片上系统的设计变得越来越复杂。 由于采用 IP 核复用技术可以简化多功能芯片的设计，开发IP 核成为当前片上系统设计的重要手段 ABSTRACT With the rapid development of electronic technology, FPGA(Field Programmable Gate Array) based on programmable logic device such as PAL、EPLD is widely used in many aspects of our world. It occurs as part of a special integrated circuit in the field of a half custom circuit, not only solving the shortage of custom circuit, but solving the limit of the original programmable device gate number. As is known to us , FPGA is widely used in the communication, data process, network, instrument, industrial control, military, and aerospace. How to realize the fast sequential convergence、low power consumption、cost、the optimization of clock management and reduce the complexity of the design of FPGA and PCB is always the key problem for engineers . Nowadays, with the development of higher density 、greater capacity、lower power consumption FPGA, Very large scale integrated circuit develops rapidly. The scale of system on a chip is larger and larger, making it more and more complex to design SoC. Using the IP core reuse technology can simplify the design of multifunction chip. Exploiting IP core becomes important approach while designing the system on chip. Key words: FPGA, integrated circuit, IP core 目 录 一、前言 1 二、主题 3 2.1 FPGA发展趋势 3 2.2 FPGA的一些基本类型： 3 2.3 IP核的现状和发展趋势 5 2.3.1 IP的主要来源 5 2.3.2 IP核的分类 7 2 .4 IP开发 7 2.4.1 IP的基本特征 8 2.4.2 IP开发流程 8 2.4.3 IP设计的四大阶段 8 2.5 Verilog HDL语言特点及优势 10 三、总结 11 参考文献 12 一、前言 随着超大规模集成电路技术的不断发展， 集成电路的集成度越来越高,，片上系统(SoC) 的规模越来越大, 因此片上系统的设计变得越来越复杂。由于采用IP 核复用技术可以简化多功能芯片的设计, 开发IP 核成为当前片上系统的重要设计手段