第六章 采用中、大规模集成电路的逻辑设计（The sixth chapter used in large scale integrated circuit, logic design）.docVIP

第六章 采用中、大规模集成电路的逻辑设计（The sixth chapter used in large scale integrated circuit, logic design） The sixth chapter used in large scale integrated circuit, logic design Teaching emphasis: Based on the understanding of the typical, large scale integrated circuit logic function, master the modern logic design direction. Teaching difficulties: the concept using bidirectional shift register design counter mode. 6.1 binary parallel adder (four CLA 74283) This can improve the speed of the four - bit adder 74283. For the integrated circuit, mainly to grasp its external function, so as to design other logic circuit. General understanding only of internal logic circuit. Four CLA 74283 is a combination of logic components in scale integrated circuit. The 74283 pin is less, the input for the summand and additives were 8, another from the low end to carry 1. The output end of the 5, 4 and 1 for the number of end to end high carry. The two end can be used to carry capacity expansion. Function: as a binary number of summand and additives addition operation, the operation result as a binary number, can also be seen as code. 6.1 cases with a four bit binary adder 74283 to design a four bit adder / subtracter. The signal pins within the logic symbol symbol and the external circuit input pin to make the distinction. Design: the addition, signal directly to the pin; the first meiotic together with the sign bit bitwise reverse subtraction, at the same time, from the low end to carry home 1, which become the complementary signals before it is added to the pin, put into addition and subtraction. Design method: an exclusive OR gate output terminals in each pin addend at the front of the two input XOR gate, terminal one after the input signal at the addend, another is connected with the addition and subtraction of control signal to carry low end connecting the control terminal. When the control signal terminal 1, input signal through the XOR gate after a subtraction operation; when the anti con