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fpga概略(fpga概略)
fpga概略(fpga概略)
FPGA profile
background
At present, the circuit design completed by hardware description language (Verilog or VHDL) can be simplified
Single synthesis and layout, fast burning to FPGA to test, is the mainstream of modern IC design verification technology. These editable components can be used to implement some basic logic gates (such as AND, OR, XOR, NOT), or a more complex set of functions, such as a decoder or mathematical equation. In most FPGA, these can edit component also includes memory devices such as flip flops (flip flop) or other more complete block of memory. The system designer can connect the logical blocks inside the FPGA by an editable connection as needed, as if a circuit board was placed in a chip. The logic block and connection of a finished product FPGA can be changed according to the designer, so FPGA can complete the logic function needed. FPGA is generally slower than ASIC (proprietary integrated chips), unable to perform complex designs, and consume more power. But they also have a lot of advantages, such as fast finished products, modifications that can be made to correct bugs in the process and cheaper costs. Vendors may also offer cheap but poorly edited FPGA. Because these chips have poor editing capabilities, the development of these designs is done on a regular FPGA, and then the design is transferred to a chip similar to the ASIC. Another approach is to use CPLD (complex programmable logic devices).
The relationship between CPLD and FPGA
As early as the middle of the 1980s, FPGA had taken root in PLD devices. CPLD and FPGA include a relatively large number of editable logical units. The density of CPLD logic gates is between several thousand to tens of thousands of logical units, and FPGA is usually in tens of thousands to millions. The main difference between CPLD and FPGA is their system structure. CPLD is a somewhat restrictive structure. This structure consists of one or more logical groups of columns with editable r
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