m25p80程序（M25p80 program）.docVIP

m25p80程序（M25p80 program） From: /blog/cns! FBA4D341BFAE0326! 1245.entry MCU:MSP430. Memory: M25P80 (SPI bus) Although the MSP430 itself SPI bus module. But the program did not use this. But operated by ordinary analog I/O bus timing. With the following code: When debugging, made a mistake. I was super idiot to write only 1 FLASHRAM programming 0, not from 0 to 1, the results in the mode when continuous to the first address number, and then to become 0, then read back data in all 0, thought it was his time did not understand fixed. Inadvertently changed the address rewriting reread normal data. Genius / so I think it is the first address I have been writing bad (when debugging stop write cycle). Then I like to change the address to write a new number, read, find data or not. Just remember this feature of FLASH RAM, as E2RAM can with the change with the write.FLASH first erase write again. Remember! /********************************************************************* Company name: * * * module name: SPI bus FLASHRAM reader module * Create: Date: * * Revision: Date: * * Function Description: * * Other Description: * * * version: VER 1 **********************************************************************/ #define M25_CLK_0 P4OUT=~BIT2 / / 0 clock #define M25_CLK_1 P4OUT|=BIT2 / / 1 clock #define M25_SI_0 P4OUT=~BIT3 / / 0 input, the rising edge of write data #define M25_SI_1 P4OUT|=BIT3 / / 1 input #define M25_SO (P4IN 0X80) 7 / / read data, the falling edge of reading #define M25_CS_0 P5OUT=~BIT2 / / CS effectively #define M25_CS_1 P5OUT|=BIT2 / / deselect #define M25_WP_0 P4OUT=~BIT5 #define M25_WP_1 P4OUT|=BIT5 #define M25_HD_0 P4OUT=~BIT4 //C is low, the falling edge of HOLD HOLD model #define M25_HD_1 P4OUT|=BIT4 #define WREN 0X06 / / write enable #define WRDI 0X04 / / write disable #define RDSR 0X05 / / read the status register #define WRSR 0X01 / / write status register WEL 0 not allowed to write #define READ 0X03 / / read byte #define FAST_READ 0X0B / / fast