psp被选定为cmos晶体管模型的新标准（The new standard PSP was selected for CMOS transistor model）.docVIP

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psp被选定为cmos晶体管模型的新标准（The new standard PSP was selected for CMOS transistor model）.doc

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psp被选定为cmos晶体管模型的新标准（The new standard PSP was selected for CMOS transistor model）

psp被选定为cmos晶体管模型的新标准（The new standard PSP was selected for CMOS transistor model） The new standard PSP was selected for CMOS transistor model Internet time: 2006 24 March 03 The print edition recommended to Tongren sends a query After months of intense and often combative debate, the compact model Council (CMC) has selected a new industry standard CMOS transistor model. The model developed by Pennsylvania State University and PHILPS electronics company, which is called PSP model. Now, the PSP model replaced several years of the BSIM3 and BSIM4 standard, has become the new industry standard. PSP model is a kind of surface potential (surface-potential) model. Compared with other models available, people think that the surface potential model is closer to the transistor physical behavior, and can make a better prediction on the performance of IC. It allows the model of gate leakage and the effects of quantum mechanics (QME) into consideration, along with the CMOS technology becomes more and more subtle, these factors become more and more important. The PSP models supporters said the model based CMOS transistor based on the physical characteristics of work, can work with other model parameters are less. The chairman of the CMC Josef Watts, although the technology experts believe that in the 90nm node and below BSIM4 can be a very good model, but the defect of BSIM4 itself can cause problems in some simulation applications, even in the 180 and 130nm node is no exception. According to Watts, BSIM3 and BSIM4 concept based on threshold voltage is the cause of this problem. As a kind of surface potential model, PSP does not use specific assumptions are based on voltage model. So, from the physical point of view, PSP is a more accurate model, especially in the source and drain around zero bias operation, or when the gate bias voltage near the threshold voltage, the situation is more serious, Watts said. The surface potential model is closer to the physical behavior of transis