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impact of scaling on cmos chip failure rate, and design rules for hot carrier reliability扩展对cmos芯片失败率的影响,为热载流子可靠性设计规则.pdfVIP

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impact of scaling on cmos chip failure rate, and design rules for hot carrier reliability扩展对cmos芯片失败率的影响,为热载流子可靠性设计规则.pdf

    impact of scaling on cmos chip failure rate, and design rules for hot carrier reliability扩展对cmos芯片失败率的影响,为热载流子可靠性设计规则

    VLSI DESIGN (C) 2001 OPA (Overseas Publishers Association) N.V. 2001, Vol. 13, Nos. 1-4, pp. 111-115 Published by license under Reprints available directly from the publisher the Gordon and Breach Science Publishers imprint, Photocopying permitted by license only member of the Taylor Francis Group. Impact of Scaling o

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