space-based fpga radio receiver design, debug, and development of a radiation-tolerant computing system天基fpga无线电接收机的设计、调试和耐辐射计算系统的开发.pdfVIP

Hindawi Publishing Corporation International Journal of Reconfigurable Computing Volume 2010, Article ID 546217, 12 pages doi:10.1155/2010/546217 Research Article Space-Based FPGA Radio Receiver Design, Debug, and Development of a Radiation-Tolerant Computing System Zachary K. Baker, Mark E. Dunham, Keith Morgan, Michael Pigue, Matthew Stettler, Paul Graham, Eric N. Schmierer, and John Power Los Alamos National Laboratory, Los Alamos, NM 87545, USA Correspondence should be addressed to Zachary K. Baker, zbaker@ Received 5 March 2010; Revised 28 July 2010; Accepted 14 September 2010 Academic Editor: Lionel Torres Copyright © 2010 Zachary K. Baker et al. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited. Los Alamos has recently completed the latest in a series of Reconfigurable Software Radios, which incorporates several key innovations in both hardware design and algorithms. Due to our focus on satellite applications, each design must extract the best size, weight, and power performance possible from the ensemble of Commodity Off-the-Shelf (COTS) parts available at the time of design. A large component of our work lies in determining if a given part will survive in space and how it will fail under various space radiation conditions. Using two Xilinx Virtex 4 FPGAs, we have achieved 1 TeraOps/second signal processing on a 1920 Megabit/second datastream. This processing capability enables very advanced algorithms such as our wideband RF compression scheme to operate at the source, allowing bandwidth-constrained applications to deliver previously unattainable performance. This