Controlling switchnode ringing in synchronous （在同步控制switchnode响）.pdfVIP

Texas Instruments Incorporated Power Management Controlling switch-node ringing in synchronous buck converters By Robert Taylor, Applications Engineer, and Ryan Manack, Field Applications Engineer Introduction approach, and the benefits of each are also discussed. As power-supply efficiency becomes more important, faster These techniques can be nullified by poor power-supply switching speeds are necessary to reduce the losses. layout, so it is important to take this into consideration However, as switching speeds are increased, there are as well. Please see Reference 1 for more information negative trade-offs that must be taken into account, such about layout. as a consequential increase in electromagnetic interfer- Ringing caused by synchronous buck ence (EMI). converter’s parasitics In a synchronous buck converter, fast-switching field- effect transistors (FETs) can experience significant voltage The circuit in Figure 1 shows the power-stage components overshoots and ringing on the switch node. The magnitude for a synchronous buck converter. Included in this model of the ringing is a function of the high-side MOSFET’s are the parasitic inductances and capacitances responsible switching speed and the stray inductances in the layout for switch-node ringing. and FET package. Proper techniques for circuit and layout Assume that the converter is in steady state. During the design must be observed to keep the ringing below the portion of the switching cycle when the low-side FET is absolute maximum rating of the sync