S3C2440处理器寄存器整理.pdf

S3C2440ARM920T内核处理器寄存器整理 // Memorycontrol 13 #definerBWSCON (*(volatile unsigned*)0x48 )//Bus width wait status #definerBANKCON (*(volatile unsigned*)0x48 4)//Boot ROMcontrol #definerBANKCON1 (*(volatile unsigned*)0x48 8)//BANK1 control #definerBANKCON2 (*(volatile unsigned*)0x48 c)//BANK2 cControl #definerBANKCON3 (*(volatile unsigned*)0x48 10)//BANK3 control #definerBANKCON4 (*(volatile unsigned*)0x48 14)//BANK4 control #definerBANKCON5 (*(volatile unsigned*)0x48 18)//BANK5 control #definerBANKCON6 (*(volatile unsigned*)0x48 1c)//BANK6 control #definerBANKCON7 (*(volatile unsigned*)0x48 20)//BANK7 control #definerREFRESH (*(volatile unsigned*)0x48 24)//DRAM/SDRAM refresh #definerBANKSIZE (*(volatile unsigned*)0x48 28)//Flexible BankSize #definerMRSRB6 (*(volatile unsigned*)0x48 2c)//Mode registersetfor SDRAM #definerMRSRB7 (*(volatile unsigned*)0x48 30)//Mode registersetfor SDRAM // USBHost // INTERRUPT 8 #definerSRCPND (*(volatile unsigned*)0x4a )//Interrupt requeststatus #definerINTMOD (*(volatileunsigned*)0x4a 4)//Interrupt modecontrol #definerINTMSK (*(volatile unsigned*)0x4a 8)//Interrupt maskcontrol #definerPRIORITY (*(volatile unsigned*)0x4a a)//IRQ prioritycontrol #definerINTPND (*(volatile unsigned*)0x4a 10)//Interrupt requeststatus #definerINTOFFSET (*(volatile unsigned*)0x4a 14)//Interruot requestsourceoffset #definerSUBSRCPND (*(volatile unsigned*)0x4a 18)//Sub source pending #definerINTSUBMSK (*(volatile unsigned*)0x4a 1c)//Interrupt sub mask // DMA 36 #definerDISRC (*(volatile unsigned*)0x4b )//DMA Initialsource #definerDISRCC (*(volatile unsigned*)0x4b 4)//DMA Initialsourcecontrol #definerDIDST (*(volatile unsigned*)0x4b 8)//DMA Initial Destination #definerDIDSTC (*(volatile unsigned*)0x4b c)//DMA Initia