基于FPGA的复数浮点协方差矩阵实现.docVIP

基于FPGA的复数浮点协方差矩阵实现 　　摘 要:基于FPGA的协方差矩阵运算的实现大多采用的是定点计算方式,在运算过程中,存在数据处理动态范围小,容易溢出,截断误差等问题。加之以空间谱估计为研究背景的协方差矩阵运算,大多得到的是针对特殊阵列模型的实对称矩阵,不具备通用性。针对定点运算的不足和该运算的适用范围,研究了浮点运算和复数运算的特点,提出了基于复数矢量的浮点协方差运算的FPGA实现方案。在Altera\\ stratix \\EP1S20F780C7中的仿真和调试结果表明了该方案的有效性。 　　关键词:协方差矩阵运算; 浮点运算; 复数运算; FPGA 　　中图分类号:TN919; TP302文献标识码:A 　　文章编号:1004-373X(2010)15-0121-04 　　 　　Realization of Complex Floating-point Covariance Matrix Operation Based on FPGA 　　WEI Yu-mei, LIU Shuai, JIN Ming 　　(Harbin Institute of Technology, Weihai 264209, China) 　　Abstract: The covariance matrix operation based on FPGA is realized with the fix-point calculation mode mostly, but there are some problems in the computing process, such as small dynamic range of data processing, easy overflowing, truncation error and so on. Additionally, covariance matrix operation that takes the spatial spectrum estimation as the research background mostly gets the real symmetric matrix which is in connection with special array model, and does not have universality. To direct at the shortness and application scope of the fixed-point operation, and implementing scheme of complex floating-point ??covariance?? matrix operation based on FPGA is put forward after the study on the characteristics of the floating point operation and complex operation. The results of simulation and debugging on EP1S20F780C7 indicate that the scheme is effective. 　　Keywords: covariance matrix operation; floating-point arithmetic; complex arithmetic; FPGA 　　 　　0 引 言 　　协方差矩阵的计算是信号处理领域的典型运算,是实现多级嵌套维纳滤波器、空间谱估计、相干源个数估计以及仿射不变量模式识别的关键部分,广泛应用于雷达、声呐、数字图像处理等领域。采用??FPGA??(Field Programmable Gate Array)可以提高该类数字信号处理运算的实时性,是算法工程化的重要环节。但是??FPGA??不适宜对浮点数的处理,对复杂的不规则计算开发起来也比较困难。故目前国内外[1-4]协方差运算的FPGA实现都是采用定点运算方式。 　　在所有运算都是定点运算的情况下,每次乘法之后数据位宽都要扩大一倍。若相乘后的数据继续做加减运算,为了保证数据不溢出,还必须将数据位宽扩展?┮晃华?,而协方差矩阵的运算核心就是乘累加单元,随着采样点数的增加,位宽扩展呈线性增加。最终导致??FPGA??器件资源枯竭,无法实现设计。为了保证算法的实现,必须对中间运算数据进行截断,将每次累加的结果除2(可以通过移位运算来实现),以避免溢出。 　　此外,在应用MUSIC算法[5]时,各种计算都是复数运算。为达到减少算法的计算量,提高MUSIC算法处理速度的目