[互联网]C6000体系结构与汇编语言1--内核结构与汇编.ppt

* * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * 一个执行包中最多有8条并行指令，每条指令都是32bits的；一个取指包最多是 256bits的，可能包含1~8个执行包； * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * 指令是6bits的，寄存器是5bits的，所以剩余21bits * * * * * * Operands - 32/40-bit Register, 5-bit Constant instr .unit src, src, dst 32-bitReg 40-bitReg src src 32-bitReg 5-bitConst 32-bitReg 40-bitReg dst .L or .S Operands - 32/40-bit Register, 5-bit Constant OR.L1 A0, A1, A2 instr .unit src, src, dst 32-bitReg 40-bitReg src src 32-bitReg 5-bitConst 32-bitReg 40-bitReg dst .L or .S Operands - 32/40-bit Register, 5-bit Constant OR.L1 A0, A1, A2 ADD.L2 -5, B3, B4 instr .unit src, src, dst 32-bitReg 40-bitReg src src 32-bitReg 5-bitConst 32-bitReg 40-bitReg dst .L or .S Operands - 32/40-bit Register, 5-bit Constant OR.L1 A0, A1, A2 ADD.L2 -5, B3, B4 ADD.L1 A2, A3, A5:A4 instr .unit src, src, dst 32-bitReg 40-bitReg src src 32-bitReg 5-bitConst 32-bitReg 40-bitReg dst .L or .S Operands - 32/40-bit Register, 5-bit Constant OR.L1 A0, A1, A2 ADD.L2 -5, B3, B4 ADD.L1 A2, A3, A5:A4 SUB.L1 A2, A5:A4, A5:A4 instr .unit src, src, dst 32-bitReg 40-bitReg src src 32-bitReg 5-bitConst 32-bitReg 40-bitReg dst .L or .S Operands - 32/40-bit Register, 5-bit Constant OR.L1 A0, A1, A2 ADD.L2 -5, B3, B4 ADD.L1 A2, A3, A5:A4 SUB.L1 A2, A5:A4, A5:A4 ADD.L2 3, B9:B8, B9:B8 instr .unit src, src, dst 32-bitReg 40-bitReg src src 32-bitReg 5-bitConst 32-bitReg 40-bitReg dst .L or .S To move the content of a register (A or B) to another register (B or A) use the move “MV” Instruction, e.g.: MV A0, B0 MV B6, B7 To move the content of a control register to another register (A or B) or vice-versa use the MVC instruction, e.g.: MVC IFR, A0 MVC A0, IRP Register to register data transfer TMS320C62/C64/67 Instruction Set C62/C64 Basic Instruction Set (by category) Arithmetic ABSADDADDAADDK