LM2726M;LM2726MX;中文规格书,Datasheet资料12.pdf

LM2726M;LM2726MX;中文规格书,Datasheet资料12.pdf

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LM2726M;LM2726MX;中文规格书,Datasheet资料12

LM2725,LM2726 LM2725/LM2726 High Speed Synchronous MOSFET Drivers Literature Number: SNVS144B / High Speed Synchronous MOSFET Drivers General Description The top gate bias voltage needed by the top MOSFET can be obtained through an external bootstrap structure. Minimum The LM2725/LM2726 is a family of dual MOSFET drivers that input pulse width is as low as 55ns. drive both the top MOSFET and bottom MOSFET in a push- pull structure simultaneously. It takes a logic level PWM input Features and splits it into two complimentary signals with a typical 20ns dead time in between. The built-in shoot-through protection ■ High peak output current circuitry prevents the top and bottom FETs from turning on ■ Adaptive shoot-through protection simultaneously. With a bias voltage of 5V, the peak sourcing ■ 36V SW pin absolute maximum voltage and sinking current for each driver of the LM2725 is about ■ Input Under-Voltage-Lock-Out 1.2A and that of the LM2726 is about 3A. In an SO-8 package, ■ Typical 20ns internal delay each driver is able to handle 50mA average current. When EN signal is asserted the input UVLO (Under Voltage Lock ■ Plastic 8-pin SO package Out) ensures that all the driver outputs stay low until the sup- ply rail exceeds the power-on threshold during system power Applications on, or after the supply rail drops below power-on threshold by ■ High Current DC/DC Power Supplies a spec

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