M74HCT373RM13TR,M74HCT373RM13TR,M74HCT373RM13TR,M74HCT373TTR,M74HCT373B1R, 规格书,Datasheet 资料12.pdfVIP

M74HCT373 OCTAL D-TYPE LATCH WITH 3 STATE OUTPUT NON INVERTING HIGH SPEED: tPD = 19ns (TYP.) at VCC = 4.5V LOW POWER DISSIPATION: ICC = 4µA(MAX.) at TA=25°C COMPATIBLE WITH TTL OUTPUTS : VIH = 2V (MIN.) VIL = 0.8V (MAX) SYMMETRICAL OUTPUT IMPEDANCE: DIP SOP TSSOP |IOH| = IOL = 6mA (MIN) BALANCED PROPAGATION DELAYS: tPLH ≅ tPHL ORDER CODES PIN AND FUNCTION COMPATIBLE WITH PACKAGE TUBE T R 74 SERIES 373 DIP M74HCT373B1R DESCRIPTION SOP M74HCT373M1R M74HCT373RM13TR The M74HCT373 is an high speed CMOS OCTAL TSSOP M74HCT373TTR LATCH WITH 3-STATE OUTPUTS fabricated with sub-micron silicon gate C2MOS technology. level) and when OE is in high level the outputs will This 8-BIT D-Type latches is controlled by a latch be in a high impedance state. enable input (LE) and output enable input (OE). The 3-State output configuration and the wide While the LE input is held at a high level, the Q choice of outline make bus organized system outputs will follow the data input. When the LE is simple. taken low, the Q outputs will be latched at the logic All inputs are equipped with protection circuits level of D input data. against static discharge and transient excess While the OE input is at low level, the eight outputs voltage. will be in a normal logic state (high or low logic PIN CONNECTION AND IEC LOGIC SYMBO