官方说明书intersil ISL90840 数据手册.pdf

ISL90840 ® Quad Digitally Controlled Potentiometers (XDCP™) Data Sheet November 14, 2006 FN8086.2 2 ® Low Noise, Low Power I C Bus, 256 Taps Features The ISL90840 integrates four digitally controlled • Four potentiometers in one package potentiometers (XDCP) on a monolithic CMOS integrated • 256 resistor taps - 0.4% resolution circuit. 2 • I C serial interface The digitally controlled potentiometers are implemented with - Three address pins, up to eight devices/bus a combination of resistor elements and CMOS switches. The position of the wipers are controlled by the user through the - Write/Read capability 2 I C bus interface. Each potentiometer has an associated • Power-on preset to mid-scale (128 tap position) volatile Wiper Register (WR) that can be directly written to and read by the user. The contents of the WR controls the • Wiper resistance: 70Ω typical @ 3.3V position of the wiper. When powered on the ISL90810’s • Standby current 5µA max wiper will always commence at mid-scale (128 tap position). • Power supply: 2.7V to 5.5V The