官方说明书ANALOG DEVICES AD9226 数据手册.pdf

a Complete 12-Bit, 65 MSPS ADC Converter AD9226 FEATURE FUNCTIONAL BLOCK DIAGRAM Signal-to-Noise Ratio: 69 dB @ fIN = 31 MHz Spurious-Free Dynamic Range: 85 dB @ fIN = 31 MHz CLK AVDD DRVDD Intermodulation Distortion of –75 dBFS @ fIN = 140 MHz ENOB = 11.1 @ fIN = 10 MHz DUTY CYCLE STABILIZER SHA Low-Power Dissipation: 475 mW VINA 8-STAGE MDAC1 A/D No Missing Codes Guaranteed VINB 1-1/2-BIT PIPELINE Differential Nonlinearity Error: 0.6 LSB A/D 4 16 3 Integral Nonlinearity Error: 0.6 LSB CAPT CALIBRATION Clock Duty Cycle Stabilizer CAPB ROM CORRECTION LOGIC Patented On-Chip Sample-and-Hold with 12 VREF OUTPUT BUFFERS OTR Full Power Bandwidth of 750 MHz