官方说明书HYNIX 200pin Unbuffered DDR2 SDRAM SO-DIMMs based on 512 Mb 1st ver.pdf

/file/2626756 From ManualL ManualL collects and classifies the global product instrunction manuals to help users access anytime and anywhere, helping users make better use of products. Home: / Chinese: / This Manual: /file/2626756 200pin Unbuffered DDR2 SDRAM SO-DIMMs based on 512 Mb 1st ver. This Hynix unbuffered Slim Outline Dual In-Line Memory Module(DIMM) series consists of 512Mb 1st ver. DDR2 SDRAMs in Fine Ball Grid Array(FBGA) packages on a 200pin glass-epoxy substrate. This Hynix 512Mb 1st ver. based Unbuffered DDR2 SO-DIMM series provide a high performance 8 byte interface in 67.60mm width form factor of indus- try standard. It is suitable for easy interchange and addition. FEATURES • JEDEC standard Double Data Rate2 Synchronous • Programmable Burst Length 4 / 8 with both sequen- DRAMs (DDR2 SDRAMs) with 1.8V +/- 0.1V Power tial and interleave mode Supply • Auto refresh and self refresh supported • All inputs and outputs are compatible with SSTL_1.8 • 8192 refresh cycles / 64ms interface • Serial presence detect with EEPROM • Posted CAS • DDR2 SDRAM Package: 60ball(x8), 84ball(x16) • Programmable CAS Latency 3 ,4 ,5 FBGA • OCD (Off-Chip Driver Impedance Adjustment) and