- 1、原创力文档(book118)网站文档一经付费(服务费),不意味着购买了该文档的版权,仅供个人/单位学习、研究之用,不得用于商业用途,未经授权,严禁复制、发行、汇编、翻译或者网络传播等,侵权必究。。
- 2、本站所有内容均由合作方或网友上传,本站不对文档的完整性、权威性及其观点立场正确性做任何保证或承诺!文档内容仅供研究参考,付费前请自行鉴别。如您付费,意味着您自己接受本站规则且自行承担风险,本站不退款、不进行额外附加服务;查看《如何避免下载的几个坑》。如果您已付费下载过本站文档,您可以点击 这里二次下载。
- 3、如文档侵犯商业秘密、侵犯著作权、侵犯人身权等,请点击“版权申诉”(推荐),也可以打举报电话:400-050-0827(电话支持时间:9:00-18:30)。
- 4、该文档为VIP文档,如果想要下载,成为VIP会员后,下载免费。
- 5、成为VIP后,下载本文档将扣除1次下载权益。下载后,不支持退款、换文档。如有疑问请联系我们。
- 6、成为VIP后,您将拥有八大权益,权益包括:VIP文档下载权益、阅读免打扰、文档格式转换、高级专利检索、专属身份标志、高级客服、多端互通、版权登记。
- 7、VIP文档为合作方或网友上传,每下载1次, 网站将根据用户上传文档的质量评分、类型等,对文档贡献者给予高额补贴、流量扶持。如果你也想贡献VIP文档。上传文档
查看更多
IBM求职要求
Chip Development Engineer? ?? ? Job ID??STG-0337611??Job type??Full-time Regular Work country??China??Posted??26-May-2011 Work city??Beijing, Shanghai??Job area??Software Development Travel??No travel??Job category??Software Development Support Business unit??SysSwDev??Job role??Software Developer ? ? Job role skillset??General Commissionable/Sales-Incentive jobs only??No? ?? ?--------------------------------------------------------------------------------Job DescriptionIBM Chip Design Engineers are working on cutting edge SoC (System on a Chip), ASIC, High Performance Processor, and Digital Custom and Mix-signal Circuit IP design for our clients inside and outside of IBM. By employing the industry leading tools, methodology, and semiconductor technologies ranging from 90nm to 32nm and beyond, you will be participating in the delivery of end to end solutions including architecture design and performance analysis/tuning, front-end logic design and verification, back-end implementation and optimization, circuit IP design, EDA deployment, as well as Chip hardware validation.Required Skills1. CS/EE or background in digital or analog Chip Design related areas2. Research and development experience on one or more of the following areas:? Architectural design, analysis, and optimization? Proficient in Verilog/VHDL, and well conversant with programming and script languages ? Digital logic implementation and verification on the basis of the target system specification? SoC design methodology: Knowledge of SoC integration, modeling and verification at different abstract level? ASIC Back-end design methodology: Knowledge of synthesis, timing, DFT, floorplanning, physical design, signal/power integrity, packaging, and other back-end activities.? Experience/knowledge in the field of Analog and mixed-signal IP design, test and evaluation with Bulk CMOS, BiCMOS, or SOI technologies.3. Experience in one or some of the application domains, will be a plus? Mult
您可能关注的文档
最近下载
- (推荐!)人教版音乐二年级上册《报灯名》教案教学设计.pdf VIP
- 2025兴业银行总行国际业务部交易银行部招聘笔试参考题库附答案解析.docx VIP
- 一种利用酿酒废水和秸秆制备有机肥的方法.pdf VIP
- 人教版小学数学一年级下册全册教案(2024年3月修订).docx VIP
- 力劲DCC400吨压铸机说明书.pdf VIP
- 2025兴业银行总行国际业务部交易银行部招聘考试含答案.docx VIP
- 2025兴业银行总行国际业务部交易银行部招聘笔试模拟试题及答案解析.docx VIP
- 英语报刊选读词汇特色.ppt VIP
- 2025兴业银行总行国际业务部交易银行部招聘笔试含答案.docx VIP
- 2025兴业银行总行国际业务部交易银行部招聘考试备考试题及答案解析.docx VIP
原创力文档


文档评论(0)